All you need to know about Samsung and IBM's new vertical transistor breakthrough

As opposed to the current fin field-effect transistor (finFET) design wherein the electric current flows laterally or side-to-side, transistors in the new architecture are stacked vertically, allowing the current to flow up and down. This results in increased performance, improved energy flow as well as a reduction in energy loss.

IBM and Samsung recently announced a breakthrough in semiconductor design that defies convention and demonstrates a path to scaling beyond nanosheet technology.

The new approach, dubbed Vertical Transport Field Effect Transistors (VTEFT), addresses many barriers to performance and offers a pathway to the continuation of Moore's Law, the companies claim. For those unaware, Moore's Law states that the number of transistors incorporated in a chip doubles every two years.

Here's everything you need to know about the new vertical transistor breakthrough:

Vertical Transport Field Effect Transistors

As opposed to the current fin field-effect transistor (finFET) architecture wherein transistors are layered along a wafer's surface and the electric current flows laterally or side-to-side, transistors in the new VTEFT design are stacked vertically, allowing the current to flow up and down. This new approach dramatically improves performance and energy flow whilst reducing energy loss.

The revolutionary new chip architecture has the potential to deliver two times improvement in performance or reduce energy usage by 85 percent compared to scaled finFET alternatives, IBM and Samsung claim.

The latest advancement opens the door for new possibilities, such as:

• Cell phone batteries that could go more than a week, instead of days, without being charged
• Cryptomining operations, data encryption and other energy-intensive processes could require significantly less energy and have a smaller carbon footprint.
• Continued expansion of the Internet of Things (IoT) and edge devices with lower energy needs so that they can operate in more diverse environments.

"Given the constraints the industry is currently facing along multiple fronts, IBM and Samsung are demonstrating our commitment to joint innovation in semiconductor design and a shared pursuit of what we call 'hard tech'," says Dr. Mukesh Khare, Vice President, Hybrid Cloud and Systems, IBM Research.

Developed at IBM Research's Albany Nanotech Complex in New York, a world-leading ecosystem for semiconductor research, the new vertical device architecture could help the semiconductor industry deliver significant improvements and address manufacturing demands.

Earlier this year, IBM Research announced a new Gate-All-Around (GAA) nanosheet device architecture that enables it to fit 50 billion transistors in a space roughly the size of a fingernail.