India's Bold Leap Into the Future: Aiming for 3-Nanometer Chip Mastery by 2032

The Indian government, led by Union Minister Ashwini Vaishnaw, plans to produce 3-nanometer chips by 2032 to enhance domestic tech capabilities. The second phase of the Design-Linked Incentive Scheme will focus on categories, including compute and networking, aiming to promote domestic design and manufacturing prowess.

The Indian government's ambitious plan to produce cutting-edge 3-nanometer chips by the year 2032 marks a significant stride in technological advancement. Union Minister Ashwini Vaishnaw has announced this roadmap, focusing on small chips integral to modern devices like smartphones and computers.

Underlining this vision is the second phase of the Design-Linked Incentive Scheme, which emphasizes compute, radio frequency, networking, power, sensor, and memory chips. The scheme aims to empower at least 50 fabless semiconductor companies in the next phase, boosting India's self-reliance in technological production.

The initiative has already attracted significant investment, with firms drawing nearly Rs 430 crore in venture capital funding. Coupled with a comprehensive talent development program, the government is also investing Rs 4,500 crore into modernizing the Semiconductor Laboratory in Mohali, setting the stage for a revolution in the national semiconductor landscape.

(With inputs from agencies.)